Zynq Ultrascale+MPSoC Development
About this course
The course walks through FPGA development with the Zynq Ultrascale+ family, covering the hardware architecture, Vivado IPI design flow, and the software stack including SDK, PetaLinux and SDSoC. It shows how to build bare‑metal applications, create the first‑stage boot loader and assemble a custom bootable system, then demonstrates the complete process on an Ultra96 board. By the end you’ll have a working MPSoC project that integrates both hardware and software components.
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- Who stands behind it
- 8/35
- How complete the listing is
- 16/20
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What you'll learn
- Configure and program Zynq Ultrascale+ MPSoC blocks using Vivado IPI
- Develop bare‑metal applications and first‑stage boot loaders (FSBL) with Xilinx SDK
- Build and deploy Linux images for the MPSoC using PetaLinux
- Create custom hardware‑software co‑designs with SDSoC
- Understand the architecture and design flow of the Zynq Ultrascale+ FPGA family
- Run a complete MPSoC project on an Ultra96 development board
Course objectives
- Teach the end‑to‑end design flow from hardware description to a bootable system
- Provide hands‑on experience with Vivado, SDK, PetaLinux and SDSoC tools
- Demonstrate real‑time implementation on a physical Ultra96 board
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